module lib1(in1, in2, out);
  input [35:0] in1;
  input [35:0] in2;
  output [36:0] out;
  assign out = in1 + in2;
endmodule

module lib2(in1, in2, out);
  input [35:0] in1;
  input [35:0] in2;
  output [36:0] out;
  assign out = in1 + in2;
endmodule

module lib3(in1, in2, out);
  input [35:0] in1;
  input [35:0] in2;
  output [36:0] out;
  assign out = in1 + in2;
endmodule
